Non-return-to-zero (NRZ) signaling refers to a binary encoding scheme in which there is no return to a reference voltage between encoded bits. Instead, the signaling remains at a “high” voltage for consecutive “ones” and remains at a “low” voltage for consecutive “zeros.” In data transmission systems that utilize NRZ signaling, it is necessary to recover the clock based on the timing of the data transitions. In general, the clock associated with a data stream is recovered utilizing a phase locked loop (PLL). By comparing the timing of data transitions in the NRZ data stream to the phase of a voltage controlled oscillator (VCO) of the PLL, the phase error of the VCO may be determined. The VCO signal is adjusted thereto thereby locking the VCO to the embedded clock of the data. Specifically, the phase error may be “servo'd” to zero utilizing closed-loop feedback via the PLL design.
FIG. 1 depicts clock recovery loop 100 according to the prior art. Clock recovery loop 100 comprises continuous phase detector 104, VCO 105, and loop filter 106. Data 101 to be measured is received by continuous phase detector 104. VCO 105 generates a VCO signal (which is provided as recovered clock 102) that is controlled by tuning voltage 107. When a data transition occurs, continuous phase detector 104 compares the timing of the data transmission to the phase of the VCO signal. Continuous phase detector 104 is referred to as “continuous,” because it produces phase error 103 that is proportional to the difference between the timing of the data transition and the phase of the VCO signal (as opposed to a quantized or binary output that merely indicates “early versus late” but not by how much). Phase error 103 is filtered by loop filter 106 to generate tuning voltage 107 to provide the closed-loop feedback.
However, for random data, the transition from “one” to “zero,” or vice versa, is a random event. Thus, there is some uncertainty whether and when a transition will occur. For example, if the data is “01010100000000001,” for the first six bits, there will be a transition at every opportunity, because no two consecutive bits are the same. However, the next ten consecutive bits are all “zero.” A “run length” refers to the number of consecutive bits or symbols that occur without a transition. Accordingly, the example data stream has a run length of ten “zeros.” During the run length of symbols or bits, no transition occurs from “zero” to “one.” Since there is no transition during the period, there is no phase information available from the data to correct any phase error in the VCO. Furthermore, data may be communicated in a “run length limited” manner (e.g., for jitter measurements). Specifically, the permissible run length of applied data patterns must be less than some predetermined number. A typical run length limit applied to data for which the jitter is measured is 31 bits.
In general, phase detectors work by outputting phase information only when there is a transition. When there is no transition in the data (at least two consecutive symbols that are the same), known phase detectors output a zero (i.e., meaning there is no detected phase error). This characteristic has the effect of making the phase detector gain (e.g., radians/volt), a function of the transition density of the data pattern. Thus, the phase detector gain is high during the “010101” portion of the example data stream and the phase detector gain is low during the “00000000001” portion of the example data stream.
Unpredictable phase detector gain has at least two important deleterious effects. First, the PLL bandwidth becomes unpredictable, because the PLL bandwidth is directly proportional to the phase detector gain. This degrades loop performance (e.g., tracking error), which makes the loop more difficult to design. Secondly, in jitter measurements, the calibration factor is directly proportional to the phase detector gain. Thus, the accuracy of the jitter measurement is questionable, when the data being measured does not have a predictable transition density. However, it is typically advantageous to utilize a wide variety of data patterns with appreciable variation in transition density in jitter measurements.